Search All Patents in Quantum Computing
Patent US10453894
Issued 2019-10-22
Systems And Methods For Fabrication Of Superconducting Integrated Circuits
Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.
Much More than Average Length Specification
View the Patent Matrix® Diagram to Explore the Claim Relationships
USPTO Full Text Publication >
- 1. A method of fabricating a superconducting integrated circuit, the method comprising:
depositing a dielectric layer to overlie a substrate, the dielectric layer including an exposed upper surface; etching the exposed upper surface of the dielectric layer to form a trench in the dielectric layer, the etching including performing a photolithographic process; depositing a metal layer to overlie the dielectric layer, the metal layer comprising a first and a second portion, the first portion of the metal layer deposited on an unetched portion of the exposed upper surface of the dielectric layer and the second portion of the metal layer deposited in the trench; and planarizing the metal layer to remove at least some of the first portion of the metal layer, wherein depositing a metal layer to overlie the dielectric layer includes depositing a material that superconducts at or below a critical temperature.
