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Patent US10320394
Qualcomm

Superconducting Circuits For An A-and-not-b Gate Having An Exclusive-or Gate And An And Gate

Superconducting circuits-based devices and methods for an A-and-not-B gate are provided. In one example, a circuit for an A-and-not-B gate including an output terminal, a first input terminal for receiving a first set of single flux quantum (SFQ) pulses, and a second input terminal for receiving a second set of SFQ pulses is provided. The circuit may further include a first stage configured to perform an exclusive-OR operation on the first set of SFQ pulses received via the first input terminal and the second set of SFQ pulses received via the second input terminal to generate an exclusive-OR result. The circuit may further include a second stage, coupled to the first stage, configured to perform an AND operation on the exclusive-OR result and the first set of SFQ pulses received via the first input terminal and provide an output via the output terminal.

Much More than Average Length Specification


1 Independent Claims

  • Claim CLM-00001. 1. A circuit for an A-and-not-B gate comprising: an output terminal; a first input terminal for receiving a first set of single flux quantum (SFQ) pulses; a second input terminal for receiving a second set of SFQ pulses; a first stage configured to perform an exclusive-OR operation on the first set of SFQ pulses received via the first input terminal and the second set of SFQ pulses received via the second input terminal to generate an exclusive-OR result; and a second stage, coupled to the first stage, configured to perform an AND operation on the exclusive-OR result and the first set of SFQ pulses received via the first input terminal and provide an output via the output terminal.
  • Claim CLM-00008. 8. A method of operating a circuit for an A-and-not-B gate, wherein the circuit including an output terminal, the method comprising: receiving a first set of single flux quantum (SFQ) pulses via a first input terminal; receiving a second set of SFQ pulses via a second input terminal; performing an exclusive-OR operation on the first set of SFQ pulses received via the first input terminal and the second set of SFQ pulses received via the second input terminal to generate an exclusive-OR result; and performing an AND operation on the exclusive-OR result and the first set of SFQ pulses received via the first input terminal such that the circuit is configured to pass the first set of SFQ pulses to the output terminal only when inputs to the exclusive-OR operation differ and inputs to the AND operation are the same.
  • Claim CLM-00016. 16. A circuit for an A-and-not-B gate comprising: an output terminal; a first input terminal for receiving a first set of single flux quantum (SFQ) pulses; a powered junction coupled to the first input terminal; a second input terminal for receiving a second set of SFQ pulses; a first stage configured to perform an exclusive-OR operation on the first set of SFQ pulses received via the first input terminal and the second set of SFQ pulses received via the second input terminal to generate an exclusive-OR result; a second stage, coupled to the first stage, configured to perform an AND operation on the exclusive-OR result and the first set of SFQ pulses received via the first input terminal such that the circuit is configured to pass the first set of SFQ pulses to the output terminal only when inputs to the exclusive-OR operation differ and inputs to the AND operation are the same; and a powered junction coupled to the output terminal.


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