Abstract: |
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits. |
Inventor: |
Tolpygo, Sergey K. (Putnam Valley, NY, US); Amparo, Denis (White Plains, NY, US); Hunt, Richard (Park Ridge, NJ, US); Vivalda, John (Poughkeepsie, NY, US); Yohannes, Daniel (Stamford, CT, US) |
Applicant: |
Hypres Inc. (Elmsford, NY, US) |
Face Assignee: |
Hypres, Inc. (Elmsford, NY, US) |
Filed: |
2015-09-03 |
Issued: |
2017-08-22 |
Claims: |
20 |
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US9741920
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1. A superconducting integrated circuit, comprising:
(8)
(4)
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9. A method of forming a superconducting integrated circuit, comprising:
(3)
(5)
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15. A method of forming a superconducting integrated circuit, comprising:
(5)
(5)
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