Abstract: |
A computer system employs a network that between a data programming system and one or more superconducting programmable devices of a superconducting processor chip. Routers on the network, such as first-, second- and third-stage routers direct communications with the superconducting programmable devices. A superconducting memory register may load data signals received from a first-stage router into corresponding superconducting programmable devices. The system may employ additional superconducting chips, first-, second- or third-stage routers. |
Inventor: |
Rose, Geordie (Vancouver, CA); Bunyk, Paul I. (Vancouver, CA) |
Applicant: |
Rose, Geordie (Vancouver, CA); Bunyk, Paul I. (Vancouver, CA) |
Face Assignee: |
D-Wave Systems Inc. (Burnaby, CA) |
Filed: |
2008-08-18 |
Issued: |
2014-03-11 |
Claims: |
23 |
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US8670807
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1. A computer system comprising:
(4)
(4)
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