Abstract: |
A method for the development of a compilation process for a quantum circuit on a quantum processor, comprises:
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- an implementation step of the compilation method comprising:
- an iteration loop successively comprising:
- a step of simulation of a given implementation of the logical qubits on the physical qubits of the quantum processor,
- a step of detecting, in the quantum circuit, ineffective quantum gate(s),
- a step of estimating the number of quantum swap gates to be inserted into the quantum circuit so that all of the quantum gates of the quantum circuit are effective,
- a retroaction step, by means of a simulated annealing, involving a new step of simulation, until attaining, whereupon all the quantum gates are effective:
- either a minimum threshold of the number of estimated quantum value swap gates between two physical qubits,
- or a maximum threshold of iterations in the loop.
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Inventor: |
GAZDA, Arnaud (Bezons, FR); MARTIEL, Simon (Bezons, FR) |
Applicant: |
BULL SAS (Les Clayes-sous-Bois, FR) |
Face Assignee: |
N/A |
Filed: |
2019-12-26 |
Issued: |
2020-07-09 |
Claims: |
10 |
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US20200219003
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1. A method for the development of a compilation process for a quantum circuit on a quantum processor, comprising:
(1)
(15)
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4. A method for the compilation of a quantum circuit on a quantum processor, by the use of a set of quantum gates executable on the quantum processor, comprising:
(1)
(9)
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7. A method for the development of a compilation process for a quantum circuit on a quantum processor, comprising:
(0)
(19)
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8. A method for the development of a compilation process for a quantum circuit on a quantum processor, comprising:
(0)
(13)
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10. A method for the compilation of a quantum circuit on a quantum processor, by the use of a set of quantum gates executable on the quantum processor, comprising:
(0)
(15)
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11. A method for the compilation of a quantum circuit on a quantum processor, comprising:
(0)
(9)
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