| Abstract: |
In one embodiment, an edge compute node comprises processing circuitry to: receive an incoming video stream captured by a camera, wherein the incoming video stream comprises a plurality of video segments; store the plurality of video segments in a receive buffer in a memory; perform a visual computing task on a first video segment in the receive buffer; detect a resource overload on the edge compute node; receive load information corresponding to a plurality of peer compute nodes; select a peer compute node to perform the visual computing task on a second video segment in the receive buffer; replicate the second video segment from the edge compute node to the peer compute node; and receive a compute result from the peer compute node, wherein the compute result is based on the peer compute node performing the visual computing task on the second video segment. |
| Inventor: |
Zou, Yi (Portland, OR, US); Chowdhury, Mohammad Ataur Rahman (Hillsboro, OR, US) |
| Applicant: |
Intel Corporation (Santa Clara, CA, US) |
| Face Assignee: |
Intel Corporation (Santa Clara, CA, US) |
| Filed: |
2019-06-28 |
| Issued: |
2019-10-24 |
| Claims: |
25 |
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US20190327506
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1. An edge compute node, comprising:
(6)
(3)
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11. At least one non-transitory machine accessible storage medium having instructions stored thereon, wherein the instructions, when executed on a machine, cause the machine to:
(4)
(8)
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18. A method, comprising:
(3)
(8)
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22. A system, comprising:
(3)
(2)
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