Abstract: |
Among the embodiments disclosed herein are example methods for generating all Clifford gates for a system of Majorana Tetron qubits (quasiparticle poisoning protected) given the ability to perform certain 4 Majorana zero mode measurements. Also disclosed herein are example designs for scalable quantum computing architectures that enable the methods for generating the Clifford gates, as well as other operations on the states of MZMs. These designs are configured in such a way as to allow the generation of all the Clifford gates with topological protection and non-Clifford gates (e.g. a π/8-phase gate) without topological protection, thereby producing a computationally universal gate set. Several possible realizations of these architectures are disclosed. |
Inventor: |
Hastings, Matthew (Seattle, WA, US); Karzig, Torsten (Goleta, CA, US); Bonderson, Parsa (Santa Barbara, CA, US); Freedman, Michael (Santa Barbara, CA, US); Lutchyn, Roman (Santa Barbara, CA, US); Nayak, Chetan (Santa Barbara, CA, US) |
Applicant: |
Microsoft Technology Licensing, LLC (Redmond, WA, US) |
Face Assignee: |
Microsoft Technology Licensing, LLC (Redmond, WA, US) |
Filed: |
2017-06-28 |
Issued: |
2019-07-09 |
Claims: |
19 |
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US10346348
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1. A quantum computing device, comprising:
(6)
(1)
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10. A system, comprising:
(4)
(1)
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