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Cryptocurrency: Platforms
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Application US20180262341
Published 2018-09-13
Secure Firmware Transaction Signing Platform Apparatuses, Methods And Systems
The Secure Firmware Transaction Signing Platform Apparatuses, Methods and Systems (“SFTSP”) transforms transaction signing request inputs via SFTSP components into transaction signing response outputs. A transaction signing request message for a transaction may be received at a first HSM. An encrypted master private key associated with the transaction may be obtained from a second HSM. A private key decryption key associated with the first HSM may be retrieved from the first HSM's tamper-proof storage. The encrypted master private key may be decrypted using the private key decryption key. A transaction hash and a keychain path associated with the transaction signing request message may be determined. A signing private key for the keychain path may be generated by the first HSM using the decrypted master private key. The transaction hash may be signed by the first HSM using the signing private key, and the generated signature may be returned.
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- 1. A transaction signing apparatus, comprising:
a memory; a component collection in the memory, including: a secure firmware transaction signing component implemented by a first hardware security module (HSM); a processor disposed in communication with the memory, and configured to issue a plurality of processing instructions from the component collection stored in the memory,
wherein the processor issues instructions from the secure firmware transaction signing component, stored in the memory, to:
receive, via at least one processor, a transaction signing request message for a transaction;
obtain, via at least one processor, an encrypted master private key associated with the transaction from a second HSM;
retrieve, via at least one processor, from the first HSM's tamper-proof storage, a private key decryption key associated with the first HSM;
decrypt, via at least one processor, by the first HSM, the encrypted master private key using the retrieved private key decryption key;
determine, via at least one processor, a transaction hash and a keychain path associated with the transaction signing request message, wherein generation of the keychain path includes a hierarchal tree of private-public key pairs from the decrypted master private key;
determine, via at least one processor, by the first HSM, a signing private key from the generated hierarchical tree of private-public key pairs for the determined keychain path using the decrypted master private key;
sign, via at least one processor, by the first HSM, the determined transaction hash using the generated signing private key to generate a signature; and
return, via at least one processor, the generated signature;
wherein the first and second HSMs, the memory and the processor are electronically connected.
- 14. A processor-readable transaction signing non-transient physical medium storing processor-executable components, the components, comprising:
a component collection stored in the medium, including:
a secure firmware transaction signing component implemented by a first hardware security module (HSM);
wherein the secure firmware transaction signing component, stored in the medium, includes processor-issuable instructions to:
receive, via at least one processor, a transaction signing request message for a transaction;
obtain, via at least one processor, an encrypted master private key associated with the transaction from a second HSM;
retrieve, via at least one processor, from the first HSM's tamper-proof storage, a private key decryption key associated with the first HSM;
decrypt, via at least one processor, by the first HSM, the encrypted master private key using the retrieved private key decryption key;
determine, via at least one processor, a transaction hash and a keychain path associated with the transaction signing request message, wherein generation of the keychain path includes a hierarchical tree of private-public key pairs from the decrypted master private key;
determine, via at least one processor, by the first HSM, a signing private key from the generated hierarchical tree of private-public key pairs for the determined keychain path using the decrypted master private key;
sign, via at least one processor, by the first HSM, the determined transaction hash using the generated signing private key to generate a signature; and
return, via at least one processor, the generated signature;
wherein the first and second HSMs are electronically connected.
- 15. A processor-implemented transaction signing system, comprising:
secure firmware transaction signing component means implemented by a first hardware security module (HSM), to:
receive, via at least one processor, a transaction signing request message for a transaction;
obtain, via at least one processor, an encrypted master private key associated with the transaction from a second HSM;
retrieve, via at least one processor, from the first HSM's tamper-proof storage, a private key decryption key associated with the first HSM;
decrypt, via at least one processor, by the first HSM, the encrypted master private key using the retrieved private key decryption key;
determine, via at least one processor, a transaction hash and a keychain path associated with the transaction signing request message, wherein generation of the keychain path includes a hierarchical tree of private-public key pairs from the decrypted master private key;
determine, via at least one processor, by the first HSM, a signing private key from the generated hierarchical tree of private-public key pairs for the determined keychain path using the decrypted master private key;
sign, via at least one processor, by the first HSM, the determined transaction hash using the generated signing private key to generate a signature; and
return, via at least one processor, the generated signature;
wherein the first and second HSMs, the memory and the secure firmware transaction signing component means are electronically connected.
- 16. A processor-implemented transaction signing method, comprising:
executing processor-implemented secure firmware transaction signing component instructions implemented by a first hardware security module (HSM), to:
receive, via at least one processor, a transaction signing request message for a transaction;
obtain, via at least one processor, an encrypted master private key associated with the transaction from a second HSM;
retrieve, via at least one processor, from the first HSM's tamper-proof storage, a private key decryption key associated with the first HSM;
decrypt, via at least one processor, by the first HSM, the encrypted master private key using the retrieved private key decryption key;
determine, via at least one processor, a transaction hash and a keychain path associated with the transaction signing request message, wherein generation of the keychain path includes a hierarchical tree of private-public key pairs from the decrypted master private key;
determine, via at least one processor, by the first HSM, a signing private key from the generated hierarchical tree of private-public key pairs for the determined keychain path using the decrypted master private key;
sign, via at least one processor, by the first HSM, the determined transaction hash using the generated signing private key to generate a signature; and
return, via at least one processor, the generated signature;
wherein the first and second HSMs, the memory and the secure tamper-proof firmware transaction signing component means are electronically connected.
