Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.
Claim CLM-00001. 1. A hybrid analog-digital processor configured to perform a mathematical operation, comprising:
circuitry comprising an analog processor and an analog scaling unit, wherein the circuitry is configured to:
generate a plurality of input analog signals based on an input data set;set a gain of the analog scaling unit based on one or more scaling factors;program the analog processor with a set of parameters representing a matrix;generate a plurality of output analog signals based on the plurality of input analog signals and the set of parameters;generate a plurality of amplified or attenuated output analog signals by amplifying or attenuating, using the analog scaling unit, the plurality of input analog signals and/or the plurality of output analog signals; andgenerate an output data set based on the plurality of amplified or attenuated output analog signals.
Claim CLM-00010. 10. A method for performing a mathematical operation, the method comprising:
generating a plurality of input analog signals based on an input data set; setting a gain of an analog scaling unit based on one or more scaling factors; programming an analog processor with a set of parameters representing a matrix; generating a plurality of output analog signals based on the plurality of input analog signals and the set of parameters; generating a plurality of amplified or attenuated output analog signals by amplifying or attenuating, using the analog scaling unit, the plurality of input analog signals and/or the plurality of output analog signals; and generating an output data set based on the plurality of amplified or attenuated output analog signals.
Claim CLM-00018. 18. A hybrid analog-digital processor configured to perform a mathematical operation, comprising:
circuitry comprising a photonic processor and at least one amplifier, wherein the circuitry is configured to:
generate a plurality of input optical signals based on an input data set;set a gain of the at least one amplifier based on one or more scaling factors;program the photonic processor with a set of parameters representing a matrix;generate a plurality of output optical signals based on the plurality of input optical signals and the set of parameters;generate a plurality of output analog signals based on the plurality of output optical signals;generate a plurality of amplified output signals by amplifying, using the at least one amplifier, at least one among:
the plurality of input optical signals,the plurality of output optical signals, andthe plurality of output analog signals; andgenerate an output data set based on the plurality of amplified output signals.
